Talk - ARC Processor Summit 2019

I am going to give a tour of DesignWare ARC nSIM at the ARC Processor Summit 2019 highlighting our latest cycle approximate modelling technology dubbed NCAM.


Speed, Accuracy, Performance, and Visibility - ARC Processor Simulation without Compromise!


Igor Böhm, Software Architect and Technical Lead, Synopsys


Instruction set simulators (ISS) are vital for compiler, operating system, and application development, as well as processor architecture design space exploration and verification. Because the demands for each are so different, designing an ISS that caters to all of the above application scenarios is a constant challenge. In this session we first want to show the versatility of the DesignWare ARC nSIM simulator by demonstrating how it addresses all of the above requirements. Finally, we will highlight the latest feature of nSIM, its high-speed cycle-approximate simulation mode (NCAM). We will show key NCAM use-cases such as how to arrive at the best hardware configuration, derive the best compiler optimizations, and have a fully optimized application much before final silicon is available.