Publications

2013

2012

  • Efficiently parallelizing instruction set simulation of embedded multi-core processors using region-based just-in-time dynamic binary translation

    Details PDF Project LCTES’12

2011

2010

  • Cycle-Accurate Performance Modelling in an Ultra-Fast Just-In-Time Dynamic Binary Translation Instruction Set Simulator

    Details PDF Project IC-SAMOS’10

  • Integrated Instruction Selection and Register Allocation for Compact Code Generation Exploiting Freeform Mixing of 16- and 32-bit Instructions

    Details PDF Project CGO’10

2007